--*************************************************************** --* File : UB2BCD.vhd * --* Created : 2008/01/20 Osamu Kawashima * --* Modified : Time-stamp: <08/01/22 05:40:00 kawasan> * --* * --* 8bit-Data -> 3-BCD * --* * --* Copyright 2008 Osamu Kawashima. all rights reserved * --*************************************************************** library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity UB2BCD is port ( RESET : in std_logic; SYSCLK : in std_logic; BIN_I : in std_logic_vector(7 downto 0); START : in std_logic; STOP : out std_logic; BCD_O : out std_logic_vector(11 downto 0) ); end UB2BCD; architecture RTL of UB2BCD is constant ZERO32 : std_logic_vector(31 downto 0) := (others=>'0'); type STATE is (S_READY, S_CORRECTION, S_SHIFT, S_CMPEND); signal current_state : STATE; signal next_state : STATE; --constant S_READY : std_logic_vector := x"0"; --constant S_CORRECTION : std_logic_vector := x"1"; --constant S_SHIFT : std_logic_vector := x"2"; --constant S_CMPEND : std_logic_vector := x"3"; --signal current_state : std_logic_vector(S_READY'range); --signal next_state : std_logic_vector(S_READY'range); signal bin_code : std_logic_vector(7 downto 0); signal bcd_code : std_logic_vector(11 downto 0); signal bcd_code_o : std_logic_vector(bcd_code'left downto 0); signal bcd_correction : std_logic_vector(bcd_code'left downto 0); signal bcd_o_is : std_logic_vector(bcd_code'left downto 0); signal loop_cnt : std_logic_vector(3 downto 0); signal cmpend : std_logic; signal stop_is : std_logic; begin -- State-Machine -- process (RESET,SYSCLK) begin if RESET='1' then current_state <= S_READY; elsif SYSCLK'event and SYSCLK='1' then current_state <= next_state; end if; end process; process (current_state,START,cmpend) begin if current_state=S_READY then if START='1' then next_state <= S_CORRECTION; else next_state <= S_READY; end if; elsif current_state=S_CORRECTION then next_state <= S_SHIFT; elsif current_state=S_SHIFT then next_state <= S_CMPEND; elsif current_state=S_CMPEND then if cmpend='1' then next_state <= S_READY; else next_state <= S_CORRECTION; end if; else next_state <= S_READY; end if; end process; -- State-Machine -- process (RESET,SYSCLK) begin if RESET='1' then loop_cnt <= x"0"; elsif SYSCLK'event and SYSCLK='1' then if current_state=S_READY and START='1' then loop_cnt <= x"8"; elsif current_state=S_SHIFT then loop_cnt <= loop_cnt - 1; else loop_cnt <= loop_cnt; end if; end if; end process; cmpend <= '1' when loop_cnt=x"0" else '0'; process (RESET,SYSCLK) begin if RESET='1' then bin_code <= (others=>'0'); bcd_code <= (others=>'0'); elsif SYSCLK'event and SYSCLK='1' then if current_state=S_READY and START='1' then bin_code <= BIN_I; bcd_code <= (others=>'0'); elsif current_state=S_SHIFT then bin_code <= bin_code(bin_code'left-1 downto 0) & '0'; bcd_code <= bcd_correction(bcd_correction'left-1 downto 0) & bin_code(bin_code'left); else bin_code <= bin_code; bcd_code <= bcd_code; end if; end if; end process; bcd_code_o(3 downto 0) <= bcd_code(3 downto 0) + x"3"; bcd_code_o(7 downto 4) <= bcd_code(7 downto 4) + x"3"; bcd_code_o(11 downto 8) <= bcd_code(11 downto 8) + x"3"; bcd_correction(3 downto 0) <= bcd_code_o(3 downto 0) when bcd_code_o(3)='1' else bcd_code(3 downto 0); bcd_correction(7 downto 4) <= bcd_code_o(7 downto 4) when bcd_code_o(7)='1' else bcd_code(7 downto 4); bcd_correction(11 downto 8) <= bcd_code_o(11 downto 8) when bcd_code_o(11)='1' else bcd_code(11 downto 8); process (RESET,SYSCLK) begin if RESET='1' then loop_cnt <= x"0"; elsif SYSCLK'event and SYSCLK='1' then if current_state=S_READY and START='1' then loop_cnt <= x"8"; elsif current_state=S_SHIFT then loop_cnt <= loop_cnt - 1; else loop_cnt <= loop_cnt; end if; end if; end process; process (RESET,SYSCLK) begin if RESET='1' then bcd_o_is <= (others=>'0'); elsif SYSCLK'event and SYSCLK='1' then if current_state=S_CMPEND and cmpend='1' then bcd_o_is <= bcd_code; else bcd_o_is <= bcd_o_is; end if; end if; end process; BCD_O <= bcd_o_is; process (RESET,SYSCLK) begin if RESET='1' then stop_is <= '1'; elsif SYSCLK'event and SYSCLK='1' then if current_state=S_READY and START='1' then stop_is <= '0'; elsif cmpend='1' then stop_is <= '1'; else stop_is <= stop_is; end if; end if; end process; STOP <= stop_is; end RTL;